• Alexandre Ghiti's avatar
    riscv: Implement sv48 support · e8a62cc2
    Alexandre Ghiti authored
    By adding a new 4th level of page table, give the possibility to 64bit
    kernel to address 2^48 bytes of virtual address: in practice, that offers
    128TB of virtual address space to userspace and allows up to 64TB of
    physical memory.
    
    If the underlying hardware does not support sv48, we will automatically
    fallback to a standard 3-level page table by folding the new PUD level into
    PGDIR level. In order to detect HW capabilities at runtime, we
    use SATP feature that ignores writes with an unsupported mode.
    Signed-off-by: default avatarAlexandre Ghiti <alexandre.ghiti@canonical.com>
    Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
    e8a62cc2
csr.h 8.36 KB