H-PLL Feedback Divider LSB register is an 8 bit register out
of which the first 4 bits are reserved. Current code is
writing to these reserved location. This patch corrects
this issue by left shifting the values being written to the
register by 4.

This patch has been tested on DM6467 EVM with 720P-60 and
1080I-60 inputs.
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>