NX1 SoC supports 2 lanes and has dual-phy. Should set appropriate
configuration values to both PHY registers.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/1635503947-18250-7-git-send-email-hayashi.kunihiko@socionext.comSigned-off-by: Vinod Koul <vkoul@kernel.org>