• Miquel Raynal's avatar
    spi: atmel: Prevent false timeouts on long transfers · e0205d62
    Miquel Raynal authored
    A slow SPI bus clocks at ~20MHz, which means it would transfer about
    2500 bytes per second with a single data line. Big transfers, like when
    dealing with flashes can easily reach a few MiB. The current DMA timeout
    is set to 1 second, which means any working transfer of about 4MiB will
    always be cancelled.
    
    With the above derivations, on a slow bus, we can assume every byte will
    take at most 0.4ms. Said otherwise, we could add 4ms to the 1-second
    timeout delay every 10kiB. On a 4MiB transfer, it would bring the
    timeout delay up to 2.6s which still seems rather acceptable for a
    timeout.
    
    The consequence of this is that long transfers might be allowed, which
    hence requires the need to interrupt the transfer if wanted by the
    user. We can hence switch to the _interruptible variant of
    wait_for_completion. This leads to a little bit more handling to also
    handle the interrupted case but looks really acceptable overall.
    
    While at it, we drop the useless, noisy and redundant WARN_ON() call.
    Signed-off-by: default avatarMiquel Raynal <miquel.raynal@bootlin.com>
    Acked-by: default avatarRyan Wanner <ryan.wanner@microchip.com>
    Link: https://lore.kernel.org/r/Message-Id: <20230622090634.3411468-3-miquel.raynal@bootlin.com>
    Signed-off-by: default avatarMark Brown <broonie@kernel.org>
    e0205d62
spi-atmel.c 43.5 KB