• Imre Deak's avatar
    drm/i915/bxt: Fix DSI HW state readout · db18b6a6
    Imre Deak authored
    Currently the machine hangs during booting while accessing the
    BXT_MIPI_PORT_CTRL register during pipe HW state readout. After some
    experimentation I found that the hang is caused by the DSI PLL being
    disabled, or it being enabled but with an incorrect divider
    configuration. Enabling the PLL got rid of the boot problem, so fix
    this by checking the PLL enabled state/configuration before attempting
    to read out the HW state.
    
    The DSI_PLL_ENABLE register is in the always-on power well, while the
    BXT_DSI_PLL_CTL is in power well 0. This isn't exactly matched by the
    transcoder power domain, but what we really need is just a runtime PM
    reference, which is provided by any power domain.
    
    Ville also found this dependency specified in BSpec, so I added a
    reference to that too.
    
    v2:
    - Make sure we hold a power reference while accessing the PLL registers.
    v3: (Jani)
    - Simplify check in bxt_get_dsi_transcoder_state()
    - Add comment explaining why we check for valid dividers in
      bxt_dsi_pll_is_enabled()
    
    CC: Shashank Sharma <shashank.sharma@intel.com>
    CC: Uma Shankar <uma.shankar@intel.com>
    CC: Jani Nikula <jani.nikula@intel.com>
    Fixes: c6c794a2 ("drm/i915/bxt: Initialize MIPI DSI for BXT")
    Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
    Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
    Reviewed-by: default avatarShashank Sharma <shashank.sharma@intel.com>
    Link: http://patchwork.freedesktop.org/patch/msgid/1458816100-31269-1-git-send-email-imre.deak@intel.com
    db18b6a6
intel_dsi_pll.c 15.5 KB