• David Gibson's avatar
    [POWERPC] Fix irq flow handler for 4xx UIC · 868afce2
    David Gibson authored
    At present the driver for the UIC (the embedded interrupt controller
    in 4xx chips) uses the handle_level_irq() flow handler.  It turns out
    this does not correctly handle level triggered interrupts on the UIC.
    
    Specifically, acknowledging an irq on the UIC (i.e. clearing the
    relevant bit in UIC_SR) will have no effect for a level interrupt
    which is still asserted by the external device, even if the irq is
    already masked.  Therefore, unlike handle_level_irq() we must ack the
    interrupt after invoking the ISR (which should cause the device to
    stop asserting the irq) instead of acking it when we mask it, before
    the ISR.
    
    This patch implements this change, in a new handle_uic_irq(), a
    customised irq flow handler for the UIC.  For edge triggered
    interrupts, handle_uic_irq() still uses the old flow - we must ack
    edge triggered interrupt before the ISR not after, or we could miss a
    second event which occurred between invoking the ISR and acking the
    irq.
    Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
    Acked-by: default avatarJosh Boyer <jwboyer@linux.vnet.ibm.com>
    Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
    868afce2
uic.c 9.79 KB