• Michael Ellerman's avatar
    powerpc/64e: remove unused IBM HTW code · 88715b6e
    Michael Ellerman authored
    Patch series "Reimplement huge pages without hugepd on powerpc (8xx, e500,
    book3s/64)", v7.
    
    Unlike most architectures, powerpc 8xx HW requires a two-level pagetable
    topology for all page sizes.  So a leaf PMD-contig approach is not
    feasible as such.
    
    Possible sizes on 8xx are 4k, 16k, 512k and 8M.
    
    First level (PGD/PMD) covers 4M per entry.  For 8M pages, two PMD entries
    must point to a single entry level-2 page table.  Until now that was done
    using hugepd.  This series changes it to use standard page tables where
    the entry is replicated 1024 times on each of the two pagetables refered
    by the two associated PMD entries for that 8M page.
    
    For e500 and book3s/64 there are less constraints because it is not tied
    to the HW assisted tablewalk like on 8xx, so it is easier to use leaf PMDs
    (and PUDs).
    
    On e500 the supported page sizes are 4M, 16M, 64M, 256M and 1G.  All at
    PMD level on e500/32 (mpc85xx) and mix of PMD and PUD for e500/64.  We
    encode page size with 4 available bits in PTE entries.  On e300/32 PGD
    entries size is increases to 64 bits in order to allow leaf-PMD entries
    because PTE are 64 bits on e500.
    
    On book3s/64 only the hash-4k mode is concerned.  It supports 16M pages as
    cont-PMD and 16G pages as cont-PUD.  In other modes (radix-4k, radix-6k
    and hash-64k) the sizes match with PMD and PUD sizes so that's just leaf
    entries.  The hash processing make things a bit more complex.  To ease
    things, __hash_page_huge() is modified to bail out when DIRTY or ACCESSED
    bits are missing, leaving it to mm core to fix it.
    
    
    This patch (of 23):
    
    The nohash HTW_IBM (Hardware Table Walk) code is unused since support for
    A2 was removed in commit fb5a5157 ("powerpc: Remove platforms/ wsp and
    associated pieces") (2014).
    
    The remaining supported CPUs use either no HTW (data_tlb_miss_bolted), or
    the e6500 HTW (data_tlb_miss_e6500).
    
    Link: https://lkml.kernel.org/r/cover.1719928057.git.christophe.leroy@csgroup.eu
    Link: https://lkml.kernel.org/r/820dd1385ecc931f07b0d7a0fa827b1613917ab6.1719928057.git.christophe.leroy@csgroup.euSigned-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
    Signed-off-by: default avatarChristophe Leroy <christophe.leroy@csgroup.eu>
    Cc: Jason Gunthorpe <jgg@nvidia.com>
    Cc: Nicholas Piggin <npiggin@gmail.com>
    Cc: Oscar Salvador <osalvador@suse.de>
    Cc: Peter Xu <peterx@redhat.com>
    Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
    88715b6e
mmu-e500.h 9.57 KB