• Zhipeng Gong's avatar
    drm/i915/gvt: Update time slice more frequently · 89babe7c
    Zhipeng Gong authored
    When there is only one vGPU in GVT-g and it submits workloads
    continuously, it will not be scheduled out, vgpu_update_timeslice
    is not called and its sched_in_time is not updated in a long time,
    which can be several seconds or longer.
    Once GVT-g pauses to submit workload for this vGPU due to heavy
    host CPU workload, this vGPU get scheduled out and
    vgpu_update_timeslice is called, its left_ts will be subtract
    by a big value from sched_out_time - sched_in_time.
    When GVT-g is going to submit workload for this vGPU again,
    it will not be scheduled in until gvt_balance_timeslice reaches
    stage 0 and reset its left_ts, which introduces several
    hunderand milliseconds latency.
    
    This patch updates time slice in every ms to update sched_in_time
    timely.
    
    v2: revise commit message
    v3: use more concise expr. (Zhenyu)
    Signed-off-by: default avatarZhipeng Gong <zhipeng.gong@intel.com>
    Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
    Cc: Min He <min.he@intel.com>
    Signed-off-by: default avatarZhi Wang <zhi.a.wang@intel.com>
    89babe7c
sched_policy.c 11.1 KB