• Stanislav Lisovskiy's avatar
    drm/i915: Implement vblank synchronized MBUS join changes · 8c5dbb50
    Stanislav Lisovskiy authored
    Currently we can't change MBUS join status without doing a modeset,
    because we are lacking mechanism to synchronize those with vblank.
    However then this means that we can't do a fastset, if there is a need
    to change MBUS join state. Fix that by implementing such change.
    We already call correspondent check and update at pre_plane dbuf update,
    so the only thing left is to have a non-modeset version of that.
    If active pipes stay the same then fastset is possible and only MBUS
    join state/ddb allocation updates would be committed.
    
    The full mbus/cdclk sequence will look as follows:
    1. disable pipes
    2. increase cdclk if necessary
     2.1 reprogram cdclk
     2.2 update dbuf tracker value
    3. enable mbus joining if necessary
     3.1 update mbus_ctl
     3.2 update dbuf tracker value
    4. reallocate dbuf for planes on active pipes
    5. disable mbus joining if necessary
     5.1 update dbuf tracker value
     5.2 update mbus_ctl
    6. enable pipes
    7. decrease cdclk if necessary
      7.1 update dbuf tracker value
      7.2 reprogram cdclk
    
    And in order to keep things in sync we need:
    Step 2:
    - mbus_join == old
    - mdclk/cdclk ratio == new
    Step 3:
    - mbus_join == new
    - mdclk/cdclk ratio == old when cdclk is changing in step 7
    - mdclk/cdclk ratio == new when cdclk is changing in step 2
    Step 5:
    - mbus_join == new
    - mdclk/cdclk ratio == old when cdclk is changing in step 7
    - mdclk/cdclk ratio == new when cdclk is changing in step 2
    Step 7:
    - mbus_join == new
    - mdclk/cdclk ratio == new
    
    v2: - Removed redundant parentheses(Ville Syrjälä)
        - Constified new_crtc_state in intel_mbus_joined_pipe(Ville Syrjälä)
        - Removed pipe_select variable(Ville Syrjälä)
    [v3: vsyrjala: Correctly sequence vs. cdclk updates,
                   properly describe the full sequence,
    	       shuffle code around to make the diff more legible,
    	       streamline a few things]
    [v4: vsyrjala: Move the intel_cdclk_is_decreasing_later() stuff
                   to a separate patch]
    
    Cc: Gustavo Sousa <gustavo.sousa@intel.com>
    Reviewed-by: Uma Shankar <uma.shankar@intel.com> #v3
    Signed-off-by: default avatarStanislav Lisovskiy <stanislav.lisovskiy@intel.com>
    Co-developed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
    Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
    Link: https://patchwork.freedesktop.org/patch/msgid/20240402155016.13733-13-ville.syrjala@linux.intel.com
    8c5dbb50
skl_watermark.h 2.93 KB