• Andi Kleen's avatar
    oprofile, x86: Allow setting EDGE/INV/CMASK for counter events · 914a76ca
    Andi Kleen authored
    For some performance events it's useful to set the EDGE and INV
    bits and the CMASK mask in the counter control register. The list
    of predefined events Intel releases for each CPU has some events which
    require these settings to get more "natural" to use higher level events.
    
    oprofile currently doesn't allow this.
    
    This patch adds new extra configuration fields for them, so that
    they can be specified in oprofilefs.
    
    An updated oprofile daemon can then make use of this to set them.
    
    v2: Write back masked extra value to variable.
    Signed-off-by: default avatarAndi Kleen <ak@linux.intel.com>
    Signed-off-by: default avatarRobert Richter <robert.richter@amd.com>
    914a76ca
nmi_int.c 17.1 KB