The existing implementation support only 32-bit DMA operation.
So, it fails to load the bitstream for the high DDR designs(Beyond 4GB).
To fix this issue update the DMA mask handling logic to support 44-bit
DMA operations.
Signed-off-by: Nava kishore Manne <nava.kishore.manne@amd.com>
Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
Acked-by: Xu Yilun <yilun.xu@intel.com>
Link: https://lore.kernel.org/r/20231003071409.4165149-1-nava.kishore.manne@amd.comSigned-off-by: Xu Yilun <yilun.xu@linux.intel.com>