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Harini Katakam authored
Enable jumbo frame support for Zynq Ultrascale+ MPSoC. Update the NWCFG register and descriptor length masks accordingly. Jumbo max length register should be set according to support in SoC; it is set to 10240 for Zynq Ultrascale+ MPSoC. Signed-off-by:
Harini Katakam <harinik@xilinx.com> Reviewed-by:
Punnaiah Choudary Kalluri <punnaia@xilinx.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
98b5a0f4