• Kai-Heng Feng's avatar
    drm/amdgpu: Ensure HDA function is suspended before ASIC reset · 9e051720
    Kai-Heng Feng authored
    DP/HDMI audio on AMD PRO VII stops working after S3:
    [  149.450391] amdgpu 0000:63:00.0: amdgpu: MODE1 reset
    [  149.450395] amdgpu 0000:63:00.0: amdgpu: GPU mode1 reset
    [  149.450494] amdgpu 0000:63:00.0: amdgpu: GPU psp mode1 reset
    [  149.983693] snd_hda_intel 0000:63:00.1: refused to change power state from D0 to D3hot
    [  150.003439] amdgpu 0000:63:00.0: refused to change power state from D0 to D3hot
    ...
    [  155.432975] snd_hda_intel 0000:63:00.1: CORB reset timeout#2, CORBRP = 65535
    
    The offending commit is daf8de08 ("drm/amdgpu: always reset the asic in
    suspend (v2)"). Commit 34452ac3 ("drm/amdgpu: don't use BACO for
    reset in S3 ") doesn't help, so the issue is something different.
    
    Assuming that to make HDA resume to D0 fully realized, it needs to be
    successfully put to D3 first. And this guesswork proves working, by
    moving amdgpu_asic_reset() to noirq callback, so it's called after HDA
    function is in D3.
    
    Fixes: daf8de08 ("drm/amdgpu: always reset the asic in suspend (v2)")
    Signed-off-by: default avatarKai-Heng Feng <kai.heng.feng@canonical.com>
    Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
    9e051720
amdgpu_drv.c 84.8 KB