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Tvrtko Ursulin authored
WaEnableStateCacheRedirectToCS context workaround configures the L3 cache to benefit 3d workloads but media has different requirements. Remove the workaround and whitelist the register to allow any userspace configure the behaviour to their liking. v2: * Remove the workaround apart from adding the whitelist. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Cc: kevin.ma@intel.com Cc: xiaogang.li@intel.com Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Acked-by: Anuj Phogat <anuj.phogat@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190418100634.984-1-tvrtko.ursulin@linux.intel.com Fixes: f63c7b48 ("drm/i915/icl: WaEnableStateCacheRedirectToCS") Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> [tursulin: Anuj reported no GPU hangs or performance regressions with old Mesa on patched kernel.] (cherry picked from commit 0fc2273b) Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
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