• Adam Ford's avatar
    arm64: dts: imx8mm: Slow default video_pll1 clock rate · a0deedcc
    Adam Ford authored
    Since commit 8208181f ("clk: imx: composite-8m:
    Add imx8m_divider_determine_rate") the lcdif controller has
    had the ability to set the lcdif_pixel rate which propagates
    up the tree and sets the video_pll1 rate automatically.
    
    By setting this value low, it will force the recalculation of
    video_pll1 to the lowest rate needed by lcdif instead of
    dividing a larger clock down to the desired clock speed. This
    has the  advantage of being able to lower the video_pll1 rate
    from 594MHz to 148.5MHz when operating at 1080p. It can go even
    lower when operating at lower resolutions and refresh rates.
    Signed-off-by: default avatarAdam Ford <aford173@gmail.com>
    Reviewed-by: default avatarFrieder Schrempf <frieder.schrempf@kontron.de>
    Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> # Kontron BL i.MX8MM
    Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
    a0deedcc
imx8mm.dtsi 42.6 KB