• Christian Hewitt's avatar
    clk: meson-gxbb: set fclk_div3 as CLK_IS_CRITICAL · e2576c8b
    Christian Hewitt authored
    On the Khadas VIM2 (GXM) and LePotato (GXL) board there are problems
    with reboot; e.g. a ~60 second delay between issuing reboot and the
    board power cycling (and in some OS configurations reboot will fail
    and require manual power cycling).
    
    Similar to 'commit c987ac6f ("clk:
    meson-gxbb: set fclk_div2 as CLK_IS_CRITICAL")' the SCPI Cortex-M4
    Co-Processor seems to depend on FCLK_DIV3 being operational.
    
    Until commit 05f81440 ("clk:
    meson: add fdiv clock gates"), this clock was modeled and left on by
    the bootloader.
    
    We don't have precise documentation about the SCPI Co-Processor and
    its clock requirement so we are learning things the hard way.
    
    Marking this clock as critical solves the problem but it should not
    be viewed as final solution. Ideally, the SCPI driver should claim
    these clocks. We also depends on some clock hand-off mechanism
    making its way to CCF, to make sure the clock stays on between its
    registration and the SCPI driver probe.
    
    Fixes: 05f81440 ("clk: meson: add fdiv clock gates")
    Signed-off-by: default avatarChristian Hewitt <christianshewitt@gmail.com>
    Signed-off-by: default avatarJerome Brunet <jbrunet@baylibre.com>
    Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
    e2576c8b
gxbb.c 63.7 KB