• Weinan Li's avatar
    drm/i915/gvt: update CSB and CSB write pointer in virtual HWSP · a2ae95af
    Weinan Li authored
    The engine provides a mirror of the CSB and CSB write pointer in the HWSP.
    Read these status from virtual HWSP in VM can reduce CPU utilization while
    applications have much more short GPU workloads. Here we update the
    corresponding data in virtual HWSP as it in virtual MMIO.
    
    Before read these status from HWSP in GVT-g VM, please ensure the host
    support it by checking the BIT(3) of caps in PVINFO.
    
    Virtual HWSP only support GEN8+ platform, since the HWSP MMIO may change
    follow the platform update, please add the corresponding MMIO emulation
    when enable new platforms in GVT-g.
    
    v3 : Add address audit in HWSP address update.
    
    v4 :
         Separate this patch with enalbe virtual HWSP in VM.
         Use intel_gvt_render_mmio_to_ring_id() to determine ring_id by offset.
    
    v5 : Remove unnessary check about Gen8, GVT-g only support Gen8+.
    Signed-off-by: default avatarWeinan Li <weinan.z.li@intel.com>
    Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
    Signed-off-by: default avatarZhenyu Wang <zhenyuw@linux.intel.com>
    a2ae95af
gvt.h 17.8 KB