• Chang S. Bae's avatar
    x86/fsgsbase/64: Enable FSGSBASE instructions in helper functions · a86b4625
    Chang S. Bae authored
    Add cpu feature conditional FSGSBASE access to the relevant helper
    functions. That allows to accelerate certain FS/GS base operations in
    subsequent changes.
    
    Note, that while possible, the user space entry/exit GSBASE operations are
    not going to use the new FSGSBASE instructions. The reason is that it would
    require additional storage for the user space value which adds more
    complexity to the low level code and experiments have shown marginal
    benefit. This may be revisited later but for now the SWAPGS based handling
    in the entry code is preserved except for the paranoid entry/exit code.
    
    To preserve the SWAPGS entry mechanism introduce __[rd|wr]gsbase_inactive()
    helpers. Note, for Xen PV, paravirt hooks can be added later as they might
    allow a very efficient but different implementation.
    
    [ tglx: Massaged changelog ]
    Signed-off-by: default avatarChang S. Bae <chang.seok.bae@intel.com>
    Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
    Cc: Andy Lutomirski <luto@kernel.org>
    Cc: Andi Kleen <ak@linux.intel.com>
    Cc: Ravi Shankar <ravi.v.shankar@intel.com>
    Cc: Andrew Cooper <andrew.cooper3@citrix.com>
    Cc: H. Peter Anvin <hpa@zytor.com>
    Link: https://lkml.kernel.org/r/1557309753-24073-7-git-send-email-chang.seok.bae@intel.com
    a86b4625
process_64.c 22.7 KB