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Radu Pirea authored
This patch enables SPI DMA transfers for Atmel SAM9 SoCs and implements a bounce buffer for transfers which have vmalloc allocated buffers. Those buffers are not cache coherent even if they have been transformed into sg lists. UBIFS is affected by this cache coherency issue. In this patch I also reverted "spi: atmel: fix corrupted data issue on SAM9 family SoCs"(7094576c). Signed-off-by: Radu Pirea <radu.pirea@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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