• Pratyush Yadav's avatar
    spi: spi-mem: allow specifying a command's extension · caf72df4
    Pratyush Yadav authored
    In xSPI mode, flashes expect 2-byte opcodes. The second byte is called
    the "command extension". There can be 3 types of extensions in xSPI:
    repeat, invert, and hex. When the extension type is "repeat", the same
    opcode is sent twice. When it is "invert", the second byte is the
    inverse of the opcode. When it is "hex" an additional opcode byte based
    is sent with the command whose value can be anything.
    
    So, make opcode a 16-bit value and add a 'nbytes', similar to how
    multiple address widths are handled.
    
    Some places use sizeof(op->cmd.opcode). Replace them with op->cmd.nbytes
    
    The spi-mxic and spi-zynq-qspi drivers directly use op->cmd.opcode as a
    buffer. Now that opcode is a 2-byte field, this can result in different
    behaviour depending on if the machine is little endian or big endian.
    Extract the opcode in a local 1-byte variable and use that as the buffer
    instead. Both these drivers would reject multi-byte opcodes in their
    supports_op() hook anyway, so we only need to worry about single-byte
    opcodes for now.
    
    The above two changes are put in this commit to keep the series
    bisectable.
    Signed-off-by: default avatarPratyush Yadav <p.yadav@ti.com>
    Reviewed-by: default avatarTudor Ambarus <tudor.ambarus@microchip.com>
    Link: https://lore.kernel.org/r/20200623183030.26591-3-p.yadav@ti.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
    caf72df4
spi-mxic.c 14.7 KB