• Chris Wilson's avatar
    drm/i915: Defer enabling rc6 til after we submit the first batch/context · b7137e0c
    Chris Wilson authored
    Some hardware requires a valid render context before it can initiate
    rc6 power gating of the GPU; the default state of the GPU is not
    sufficient and may lead to undefined behaviour. The first execution of
    any batch will load the "golden render state", at which point it is safe
    to enable rc6. As we do not forcibly load the kernel context at resume,
    we have to hook into the batch submission to be sure that the render
    state is setup before enabling rc6.
    
    However, since we don't enable powersaving until that first batch, we
    queued a delayed task in order to guarantee that the batch is indeed
    submitted.
    
    v2: Rearrange intel_disable_gt_powersave() to match.
    v3: Apply user specified cur_freq (or idle_freq if not set).
    v4: Give in, and supply a delayed work to autoenable rc6
    v5: Mika suggested a couple of better names for delayed_resume_work
    v6: Rebalance rpm_put around the autoenable task
    Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
    Cc: Mika Kuoppala <mika.kuoppala@intel.com>
    Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
    Link: http://patchwork.freedesktop.org/patch/msgid/1468397438-21226-7-git-send-email-chris@chris-wilson.co.ukReviewed-by: default avatarMika Kuoppala <mika.kuoppala@intel.com>
    b7137e0c
i915_gem.c 144 KB