• Brian Masney's avatar
    arm64: dts: qcom: sa8540p-ride: enable PCIe support · b8bf63f8
    Brian Masney authored
    Add the vreg_l11a, pcie3a, pcie3a_phy, and tlmm nodes that are necessary
    in order to get PCIe working on the QDrive3.
    
    This patch also increases the width of the ranges property for the PCIe
    switch that's found on this platform. Note that this change requires
    the latest trustzone (TZ) firmware that's available from Qualcomm as
    of November 2022. If this is used against a board with the older
    firmware, then the board will go into ramdump mode when PCIe is probed
    on startup.
    
    The ranges property is overridden in this sa8540p-ride.dts file since
    this is what's used to describe the QDrive3 variant with dual SoCs.
    There's another variant of this board that only has a single SoC where
    this change is not applicable, and hence why this specific change was
    not done in sa8540p.dtsi.
    
    These changes were derived from various patches that Qualcomm
    delivered to Red Hat in a downstream kernel.
    Signed-off-by: default avatarBrian Masney <bmasney@redhat.com>
    Tested-by: default avatarAndrew Halaney <ahalaney@redhat.com>
    Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
    Link: https://lore.kernel.org/r/20221202120918.2252647-1-bmasney@redhat.com
    b8bf63f8
sa8540p-ride.dts 5.53 KB