• Christophe Leroy's avatar
    powerpc/32: Avoid risk of unrecoverable TLBmiss inside entry_32.S · 0eb0d2e7
    Christophe Leroy authored
    By default, the 8xx pins an ITLB on the first 8M of memory in order
    to avoid any ITLB miss on kernel code.
    However, with some debug functions like DEBUG_PAGEALLOC and
    DEBUG_RODATA, pinning TLBs is contradictory.
    
    In order to avoid any ITLB miss in a critical section without pinning
    TLBs, we have to ensure that there is no page boundary crossed between
    the setup of a new value in SRR0/SRR1 and the associated RFI.
    
    The functions modifying srr0/srr1 are all located in setup_32.S.
    They are spread over almost 4kbytes.
    
    The patch forces a 12 bits (4kbytes) alignment for those
    functions. This garanties that the functions remain in a
    single 4k page.
    Signed-off-by: default avatarChristophe Leroy <christophe.leroy@c-s.fr>
    Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
    0eb0d2e7
entry_32.S 33.2 KB