• Thierry Reding's avatar
    clk: tegra: Fix sor1_out clock implementation · bc2e4d29
    Thierry Reding authored
    This clock was previously called sor1_src and was modelled as an input
    to the sor1 module clock. However, it's really an output clock that can
    be fed either from the safe, the sor1_pad_clkout or the sor1 module
    clocks. sor1 itself can take input from either of the display PLLs.
    
    The same implementation for the sor1_out clock is used on Tegra186, so
    this nicely lines up both SoC generations to deal with this clock in a
    uniform way.
    Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
    bc2e4d29
clk-tegra210.c 106 KB