• Paulo Zanoni's avatar
    drm/i915/icl: add basic support for the ICL clocks · c27e917e
    Paulo Zanoni authored
    This commit introduces the definitions for the ICL clocks and adds the
    basic functions to the shared DPLL framework. It adds code for the
    Enable and Disable sequences for some PLLs, but it does not have the
    code to compute the actual PLL values, which are marked as TODO
    comments and should be introduced as separate commits.
    
    Special thanks to James Ausmus for investigating and fixing a bug with
    the placement of icl_unmap_plls_to_ports() function.
    
    v2:
     - Rebase around dpll_lock changes.
    v3:
     - The spec now says what the timeouts should be.
     - Touch DPCLKA_CFGCR0_ICL at the appropriate time so we don't freeze
       the machine.
     - Checkpatch found a white space problem.
     - Small adjustments before upstreaming.
    v4:
     - Move the ICL checks out of the *map_plls_to_ports() functions
      (James)
     - Add extra encoder check (James)
     - Call icl_unmap_plls_to_ports() later (James)
    v5:
     - Rebase after the pll struct changes.
    v6:
     - Properly make the unmap function based on encoders_post_disable()
       with regarding to checks and iterators.
     - Address checkpatch comment on "min = max = x()".
    
    Cc: James Ausmus <james.ausmus@intel.com>
    Signed-off-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
    Reviewed-by: default avatarJames Ausmus <james.ausmus@intel.com>
    Link: https://patchwork.freedesktop.org/patch/msgid/20180427231436.9353-1-paulo.r.zanoni@intel.com
    c27e917e
intel_drv.h 72.5 KB