• Marek Behún's avatar
    pinctrl: armada-37xx: Correct PWM pins definitions · baf8d689
    Marek Behún authored
    The PWM pins on North Bridge on Armada 37xx can be configured into PWM
    or GPIO functions. When in PWM function, each pin can also be configured
    to drive low on 0 and tri-state on 1 (LED mode).
    
    The current definitions handle this by declaring two pin groups for each
    pin:
    - group "pwmN" with functions "pwm" and "gpio"
    - group "ledN_od" ("od" for open drain) with functions "led" and "gpio"
    
    This is semantically incorrect. The correct definition for each pin
    should be one group with three functions: "pwm", "led" and "gpio".
    
    Change the "pwmN" groups to support "led" function.
    
    Remove "ledN_od" groups. This cannot break backwards compatibility with
    older device trees: no device tree uses it since there is no PWM driver
    for this SOC yet. Also "ledN_od" groups are not even documented.
    
    Fixes: b835d695 ("pinctrl: armada-37xx: swap polarity on LED group")
    Signed-off-by: default avatarMarek Behún <kabel@kernel.org>
    Acked-by: default avatarRob Herring <robh@kernel.org>
    Link: https://lore.kernel.org/r/20210719112938.27594-1-kabel@kernel.orgSigned-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
    baf8d689
marvell,armada-37xx-pinctrl.txt 3.88 KB