• Sean Christopherson's avatar
    KVM: RISC-V: Use common KVM implementation of MMU memory caches · cc4f602b
    Sean Christopherson authored
    Use common KVM's implementation of the MMU memory caches, which for all
    intents and purposes is semantically identical to RISC-V's version, the
    only difference being that the common implementation will fall back to an
    atomic allocation if there's a KVM bug that triggers a cache underflow.
    
    RISC-V appears to have based its MMU code on arm64 before the conversion
    to the common caches in commit c1a33aeb ("KVM: arm64: Use common KVM
    implementation of MMU memory caches"), despite having also copy-pasted
    the definition of KVM_ARCH_NR_OBJS_PER_MEMORY_CACHE in kvm_types.h.
    
    Opportunistically drop the superfluous wrapper
    kvm_riscv_stage2_flush_cache(), whose name is very, very confusing as
    "cache flush" in the context of MMU code almost always refers to flushing
    hardware caches, not freeing unused software objects.
    
    No functional change intended.
    Signed-off-by: default avatarSean Christopherson <seanjc@google.com>
    Signed-off-by: default avatarAnup Patel <anup.patel@wdc.com>
    cc4f602b
vcpu.c 21 KB