• Dave Hansen's avatar
    x86/mm: Avoid incomplete Global INVLPG flushes · ce0b15d1
    Dave Hansen authored
    The INVLPG instruction is used to invalidate TLB entries for a
    specified virtual address.  When PCIDs are enabled, INVLPG is supposed
    to invalidate TLB entries for the specified address for both the
    current PCID *and* Global entries.  (Note: Only kernel mappings set
    Global=1.)
    
    Unfortunately, some INVLPG implementations can leave Global
    translations unflushed when PCIDs are enabled.
    
    As a workaround, never enable PCIDs on affected processors.
    
    I expect there to eventually be microcode mitigations to replace this
    software workaround.  However, the exact version numbers where that
    will happen are not known today.  Once the version numbers are set in
    stone, the processor list can be tweaked to only disable PCIDs on
    affected processors with affected microcode.
    
    Note: if anyone wants a quick fix that doesn't require patching, just
    stick 'nopcid' on your kernel command-line.
    Signed-off-by: default avatarDave Hansen <dave.hansen@linux.intel.com>
    Reviewed-by: default avatarThomas Gleixner <tglx@linutronix.de>
    Cc: stable@vger.kernel.org
    ce0b15d1
init.c 32.1 KB