• Marc Kleine-Budde's avatar
    can: flexcan: flexcan_read_reg_iflag_rx(): optimize reading · d3a51507
    Marc Kleine-Budde authored
    The flexcan IP core has up to 64 mailboxes, each one has a corresponding
    interrupt bit in the iflag1 or iflag2 registers and a mask bit in the
    imask1 or imask2 registers.
    
    In the timestamp (i.e. non FIFO) mode the driver needs to mask all non RX
    interrupt sources, it uses the precomputed value rx_mask of struct flexcan_priv
    for this.
    
    In certain use cases, for example the CANFD mode, the contents of the iflag2
    register is completely masked.
    
    This patch optimizes the flexcan_read_reg_iflag_rx() function by not reading
    the iflag1 or iflag2 register if the contents is masked.
    Signed-off-by: default avatarMarc Kleine-Budde <mkl@pengutronix.de>
    d3a51507
flexcan.c 48.3 KB