• Ard Biesheuvel's avatar
    ARM: 9195/1: entry: avoid explicit literal loads · 50807460
    Ard Biesheuvel authored
    ARMv7 has MOVW/MOVT instruction pairs to load symbol addresses into
    registers without having to rely on literal loads that go via the
    D-cache.  For older cores, we now support a similar arrangement, based
    on PC-relative group relocations.
    
    This means we can elide most literal loads entirely from the entry path,
    by switching to the ldr_va macro to emit the appropriate sequence
    depending on the target architecture revision.
    
    While at it, switch to the bl_r macro for invoking the right PABT/DABT
    helpers instead of setting the LR register explicitly, which does not
    play well with cores that speculate across function returns.
    Signed-off-by: default avatarArd Biesheuvel <ardb@kernel.org>
    Reviewed-by: default avatarLinus Walleij <linus.walleij@linaro.org>
    Signed-off-by: default avatarRussell King (Oracle) <rmk+kernel@armlinux.org.uk>
    50807460
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