• Anthony Yznaga's avatar
    sparc64: speed up etrap/rtrap on NG2 and later processors · a7159a87
    Anthony Yznaga authored
    For many sun4v processor types, reading or writing a privileged register
    has a latency of 40 to 70 cycles.  Use a combination of the low-latency
    allclean, otherw, normalw, and nop instructions in etrap and rtrap to
    replace 2 rdpr and 5 wrpr instructions and improve etrap/rtrap
    performance.  allclean, otherw, and normalw are available on NG2 and
    later processors.
    
    The average ticks to execute the flush windows trap ("ta 0x3") with and
    without this patch on select platforms:
    
     CPU            Not patched     Patched    % Latency Reduction
    
     NG2            1762            1558            -11.58
     NG4            3619            3204            -11.47
     M7             3015            2624            -12.97
     SPARC64-X      829             770              -7.12
    Signed-off-by: default avatarAnthony Yznaga <anthony.yznaga@oracle.com>
    Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
    a7159a87
trap_block.h 6.48 KB