• Michal Michalik's avatar
    ice: Auxbus devices & driver for E822 TS · d938a8cc
    Michal Michalik authored
    There is a problem in HW in E822-based devices leading to race
    condition.
    It might happen that, in order:
    - PF0 (which owns the PHC) requests few timestamps,
    - PF1 requests a timestamp,
    - interrupt is being triggered and both PF0 and PF1 threads are woken
    up,
    - PF0 got one timestamp, still waiting for others so not going to sleep,
    - PF1 gets it's timestamp, process it and go to sleep,
    - PF1 requests a timestamp again,
    - just before PF0 goes to sleep timestamp of PF1 appear,
    - PF0 finishes all it's timestamps and go to sleep (PF1 also sleeping).
    That leaves PF1 timestamp memory not read, which lead to blocking the
    next interrupt from arriving.
    
    Fix it by adding auxiliary devices and only one driver to handle all the
    timestamps for all PF's by PHC owner. In the past each PF requested it's
    own timestamps and process it from the start till the end which causes
    problem described above. Currently each PF requests the timestamps as
    before, but the actual reading of the completed timestamps is being done
    by the PTP auxiliary driver, which is registered by the PF which owns PHC.
    
    Additionally, the newly introduced auxiliary driver/devices for PTP clock
    owner will be used for other features in all products (including E810).
    Signed-off-by: default avatarJacob Keller <jacob.e.keller@intel.com>
    Signed-off-by: default avatarKarol Kolacinski <karol.kolacinski@intel.com>
    Signed-off-by: default avatarMichal Michalik <michal.michalik@intel.com>
    Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@intel.com> (A Contingent worker at Intel)
    Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
    d938a8cc
ice_ptp.h 12.5 KB