• Sandipan Das's avatar
    perf/x86: Make branch classifier fusion-aware · df3e9612
    Sandipan Das authored
    With branch fusion and other optimizations, branch sampling hardware in
    some processors can report a branch from address that points to an
    instruction preceding the actual branch by several bytes.
    
    In such cases, the classifier cannot determine the branch type which leads
    to failures such as with the recently added test from commit b55878c9
    ("perf test: Add test for branch stack sampling"). Branch information is
    also easier to consume and annotate if branch from addresses always point
    to branch instructions.
    
    Add a new variant of the branch classifier that can account for instruction
    fusion. If fusion is expected and the current branch from address does not
    point to a branch instruction, it attempts to find the first branch within
    the next (MAX_INSN_SIZE - 1) bytes and if found, additionally provides the
    offset between the reported branch from address and the address of the
    expected branch instruction.
    Signed-off-by: default avatarSandipan Das <sandipan.das@amd.com>
    Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
    Link: https://lore.kernel.org/r/b6bb0abaa8a54c0b6d716344700ee11a1793d709.1660211399.git.sandipan.das@amd.com
    df3e9612
utils.c 6.41 KB