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Kai Vehmanen authored
Controller needs to ensure display power is enabled only for HDA controller reset. Drop the display power-up/down calls from D0i3 entry/exit paths. This was previously not possible as codec drivers could not resume the links, and instead controller kept the reference to display power. The state of display power had be maintained in the D0i3 entry/exit code. With commit 87fc20e4 ("ASoC: SOF: Intel: hda: use hdac_ext fine-grained link management"), this is no longer needed and the code can be cleaned up. Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com> Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Reviewed-by: Keyon Jie <yang.jie@intel.com> Link: https://lore.kernel.org/r/20210322143830.3880293-1-kai.vehmanen@linux.intel.comSigned-off-by: Mark Brown <broonie@kernel.org>
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