• Dave Olson's avatar
    IB/ipath: Need to always request and handle PIO avail interrupts · e2ab41ca
    Dave Olson authored
    Now that we always use PIO for vl15 on 7220, we could get stuck forever
    if we happened to run out of PIO buffers from the verbs code, because
    the setup code wouldn't run; the interrupt was also ignored if SDMA was
    supported.  We also have to reduce the pio update threshold if we have
    fewer kernel buffers than the existing threshold.
    
    Clean up the initialization a bit to get ordering safer and more
    sensible, and use the existing ipath_chg_kernavail call to do init,
    rather than doing it separately.
    
    Drop unnecessary clearing of pio buffer on pio parity error.
    
    Drop incorrect updating of pioavailshadow when exitting freeze mode
    (software state may not match chip state if buffer has been allocated
    and not yet written).
    
    If we couldn't get a kernel buffer for a while, make sure we are
    in sync with hardware, mainly to handle the exitting freeze case.
    Signed-off-by: default avatarDave Olson <dave.olson@qlogic.com>
    Signed-off-by: default avatarRoland Dreier <rolandd@cisco.com>
    e2ab41ca
ipath_intr.c 39 KB