• Dongpo Li's avatar
    net: hix5hd2_gmac: add reset control and clock signals · 7087140d
    Dongpo Li authored
    Add three reset control signals, "mac_core_rst", "mac_ifc_rst" and
    "phy_rst".
    The following diagram explained how the reset signals work.
    
                            SoC
    |-----------------------------------------------------
    |                               ------                |
    |                               | cpu |               |
    |                               ------                |
    |                                  |                  |
    |                              ------------ AMBA bus  |
    |                         GMAC     |                  |
    |                            ----------------------   |
    | ------------- mac_core_rst | --------------      |  |
    | |clock and   |-------------->|   mac core  |     |  |
    | |reset       |             | --------------      |  |
    | |generator   |----         |       |             |  |
    | -------------     |        | ----------------    |  |
    |          |        ---------->| mac interface |   |  |
    |          |     mac_ifc_rst | ----------------    |  |
    |          |                 |       |             |  |
    |          |                 | ------------------  |  |
    |          |phy_rst          | | RGMII interface | |  |
    |          |                 | ------------------  |  |
    |          |                 ----------------------   |
    |----------|------------------------------------------|
               |                          |
               |                      ----------
               |--------------------- |PHY chip |
                                      ----------
    
    The "mac_core_rst" represents "mac core reset signal", it resets
    the mac core including packet processing unit, descriptor processing unit,
    tx engine, rx engine, control unit.
    The "mac_ifc_rst" represents "mac interface reset signal", it resets
    the mac interface. The mac interface unit connects mac core and
    data interface like MII/RMII/RGMII. After we set a new value of
    interface mode, we must reset mac interface to reload the new mode value.
    The "mac_core_rst" and "mac_ifc_rst" are both optional to be
    backward compatible with the hix5hd2 SoC.
    The "phy_rst" represents "phy reset signal", it does a hardware reset
    on the PHY chip. This reset signal is optional if the PHY can work well
    without the hardware reset.
    
    Add one more clock signal, the existing is MAC core clock,
    and the new one is MAC interface clock.
    The MAC interface clock is optional to be backward compatible with
    the hix5hd2 SoC.
    Signed-off-by: default avatarDongpo Li <lidongpo@hisilicon.com>
    Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
    7087140d
hisilicon-hix5hd2-gmac.txt 2.03 KB