• Thomas Gleixner's avatar
    x86/idt: Rework IDT setup for boot CPU · 1dcc917a
    Thomas Gleixner authored
    A basic IDT setup for the boot CPU has to be done before invoking
    cpu_init() because that might trigger #GP when accessing certain MSRs. This
    setup cannot install the IST variants on 64-bit because the TSS setup which
    is required for ISTs to work happens in cpu_init(). That leaves a
    theoretical window where a NMI would invoke the ASM entry point which
    relies on IST being enabled on the kernel stack which is undefined
    behaviour.
    
    This setup logic has never worked correctly, but on the other hand a NMI
    hitting the boot CPU before it has fully set up the IDT would be fatal
    anyway. So the small window between the wrong NMI gate and the IST based
    NMI gate is not really adding a substantial amount of risk.
    
    But the setup logic is nevertheless more convoluted than necessary. The
    recent separation of the TSS setup into a separate function to ensure that
    setup so it can setup TSS first, then initialize IDT with the IST variants
    before invoking cpu_init() and get rid of the post cpu_init() IST setup.
    
    Move the invocation of cpu_init_exception_handling() ahead of
    idt_setup_traps() and merge the IST setup into the default setup table.
    Reported-by: default avatarLai Jiangshan <laijs@linux.alibaba.com>
    Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
    Reviewed-by: default avatarLai Jiangshan <laijs@linux.alibaba.com>
    Acked-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
    Link: https://lore.kernel.org/r/20210507114000.569244755@linutronix.de
    1dcc917a
desc.h 10.9 KB