Added dt-binding documentation for Versal NET platforms.

Versal Net is a new AMD/Xilinx  SoC.

The SoC and its architecture is based on the Versal ACAP device.
The Versal Net  device includes more security features in the
platform management controller (PMC) and increases the number
of CPUs in the application processing unit (APU) and the
real-time processing unit (RPU).
Signed-off-by: Piyush Mehta <piyush.mehta@amd.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230721041119.4058430-2-piyush.mehta@amd.comSigned-off-by: Philipp Zabel <p.zabel@pengutronix.de>