• Paul Mackerras's avatar
    KVM: PPC: Book3S HV: Prohibit setting illegal transaction state in MSR · c20875a3
    Paul Mackerras authored
    Currently it is possible for userspace (e.g. QEMU) to set a value
    for the MSR for a guest VCPU which has both of the TS bits set,
    which is an illegal combination.  The result of this is that when
    we execute a hrfid (hypervisor return from interrupt doubleword)
    instruction to enter the guest, the CPU will take a TM Bad Thing
    type of program interrupt (vector 0x700).
    
    Now, if PR KVM is configured in the kernel along with HV KVM, we
    actually handle this without crashing the host or giving hypervisor
    privilege to the guest; instead what happens is that we deliver a
    program interrupt to the guest, with SRR0 reflecting the address
    of the hrfid instruction and SRR1 containing the MSR value at that
    point.  If PR KVM is not configured in the kernel, then we try to
    run the host's program interrupt handler with the MMU set to the
    guest context, which almost certainly causes a host crash.
    
    This closes the hole by making kvmppc_set_msr_hv() check for the
    illegal combination and force the TS field to a safe value (00,
    meaning non-transactional).
    
    Cc: stable@vger.kernel.org # v3.9+
    Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
    c20875a3
book3s_hv.c 81.9 KB