• Xu Yang's avatar
    perf/imx_ddr: speed up overflow frequency of cycle · e89ecd83
    Xu Yang authored
    For i.MX8MP, we cannot ensure that cycle counter overflow occurs at least
    4 times as often as other events. Due to byte counters will count for any
    event configured, it will overflow more often. And if byte counters
    overflow that related counters would stop since they share the
    COUNTER_CNTL. We can speed up cycle counter overflow frequency by setting
    counter parameter (CP) field of cycle counter. In this way, we can avoid
    stop counting byte counters when interrupt didn't come and the byte
    counters can be fetched or updated from each cycle counter overflow
    interrupt.
    
    Because we initialize CP filed to shorten counter0 overflow time, the cycle
    counter will start couting from a fixed/base value each time. We need to
    remove the base from the result too. Therefore, we could get precise result
    from cycle counter.
    Signed-off-by: default avatarXu Yang <xu.yang_2@nxp.com>
    Reviewed-by: default avatarFrank Li <Frank.Li@nxp.com>
    Link: https://lore.kernel.org/r/20230811015438.1999307-1-xu.yang_2@nxp.comSigned-off-by: default avatarWill Deacon <will@kernel.org>
    e89ecd83
fsl_imx8_ddr_perf.c 21.1 KB