• Atish Patra's avatar
    RISC-V: Add supported for ordered booting method using HSM · cfafe260
    Atish Patra authored
    Currently, all harts have to jump Linux in RISC-V. This complicates the
    multi-stage boot process as every transient stage also has to ensure all
    harts enter to that stage and jump to Linux afterwards. It also obstructs
    a clean Kexec implementation.
    
    SBI HSM extension provides alternate solutions where only a single hart
    need to boot and enter Linux. The booting hart can bring up secondary
    harts one by one afterwards.
    
    Add SBI HSM based cpu_ops that implements an ordered booting method in
    RISC-V. This change is also backward compatible with older firmware not
    implementing HSM extension. If a latest kernel is used with older
    firmware, it will continue to use the default spinning booting method.
    Signed-off-by: default avatarAtish Patra <atish.patra@wdc.com>
    Reviewed-by: default avatarAnup Patel <anup@brainfault.org>
    Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
    cfafe260
smpboot.c 3.64 KB