• Ville Syrjälä's avatar
    drm/i915: Workaround VLV/CHV DSI scanline counter hardware fail · ec1b4ee2
    Ville Syrjälä authored
    The scanline counter is bonkers on VLV/CHV DSI. The scanline counter
    increment is not lined up with the start of vblank like it is on
    every other platform and output type. This causes problems for
    both the vblank timestamping and atomic update vblank evasion.
    
    On my FFRD8 machine at least, the scanline counter increment
    happens about 1/3 of a scanline ahead of the start of vblank (which
    is where all register latching happens still). That means we can't
    trust the scanline counter to tell us whether we're in vblank or not
    while we're on that particular line. In order to keep vblank
    timestamping in working condition when called from the vblank irq,
    we'll leave scanline_offset at one, which means that the entire
    line containing the start of vblank is considered to be inside
    the vblank.
    
    For the vblank evasion we'll need to consider that entire line
    to be bad, since we can't tell whether the registers already
    got latched or not. And we can't actually use the start of vblank
    interrupt to get us past that line as the interrupt would fire
    too soon, and then we'd up waiting for the next start of vblank
    instead. One way around that would using the frame start
    interrupt instead since that wouldn't fire until the next
    scanline, but that would require some bigger changes in the
    interrupt code. So for simplicity we'll just poll until we get
    past the bad line.
    
    v2: Adjust the comments a bit
    
    Cc: stable@vger.kernel.org
    Cc: Jonas Aaberg <cja@gmx.net>
    Tested-by: default avatarJonas Aaberg <cja@gmx.net>
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99086Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
    Link: http://patchwork.freedesktop.org/patch/msgid/20161215174734.28779-1-ville.syrjala@linux.intel.comTested-by: default avatarMika Kahola <mika.kahola@intel.com>
    Reviewed-by: default avatarMika Kahola <mika.kahola@intel.com>
    ec1b4ee2
intel_sprite.c 35.1 KB