• Fenghua Yu's avatar
    drivers/net/b44: Change to non-atomic bit operations on pwol_mask · f11421ba
    Fenghua Yu authored
    Atomic operations that span cache lines are super-expensive on x86
    (not just to the current processor, but also to other processes as all
    memory operations are blocked until the operation completes). Upcoming
    x86 processors have a switch to cause such operations to generate a #AC
    trap. It is expected that some real time systems will enable this mode
    in BIOS.
    
    In preparation for this, it is necessary to fix code that may execute
    atomic instructions with operands that cross cachelines because the #AC
    trap will crash the kernel.
    
    Since "pwol_mask" is local and never exposed to concurrency, there is
    no need to set bits in pwol_mask using atomic operations.
    
    Directly operate on the byte which contains the bit instead of using
    __set_bit() to avoid any big endian concern due to type cast to
    unsigned long in __set_bit().
    Suggested-by: default avatarPeter Zijlstra <peterz@infradead.org>
    Signed-off-by: default avatarFenghua Yu <fenghua.yu@intel.com>
    Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
    Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
    f11421ba
b44.c 63.4 KB