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Maruthi Srinivas Bayyavarapu authored
When DW controller is in master mode, it can disable/enable clock during the device runtime suspend/resume sequence. Signed-off-by:
Maruthi Bayyavarapu <maruthi.bayyavarapu@amd.com> Reviewed-by:
Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
Mark Brown <broonie@kernel.org>
f4830312