• Paul Burton's avatar
    irqchip/mips-gic: Separate IPI reservation & usage tracking · f8dcd9e8
    Paul Burton authored
    Since commit 2af70a96 ("irqchip/mips-gic: Add a IPI hierarchy
    domain") introduced the GIC IPI IRQ domain we have tracked both
    reservation of interrupts & their use with a single bitmap - ipi_resrv.
    If an interrupt is reserved for use as an IPI but not actually in use
    then the appropriate bit is set in ipi_resrv. If an interrupt is either
    not reserved for use as an IPI or has been allocated as one then the
    appropriate bit is clear in ipi_resrv.
    
    Unfortunately this means that checking whether a bit is set in ipi_resrv
    to prevent IPI interrupts being allocated for use with a device is
    broken, because if the interrupt has been allocated as an IPI first then
    its bit will be clear.
    
    Fix this by separating the tracking of IPI reservation & usage,
    introducing a separate ipi_available bitmap for the latter. This means
    that ipi_resrv will now always have bits set corresponding to all
    interrupts reserved for use as IPIs, whether or not they have been
    allocated yet, and therefore that checking it when allocating device
    interrupts works as expected.
    
    Fixes: 2af70a96 ("irqchip/mips-gic: Add a IPI hierarchy domain")
    Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
    Signed-off-by: default avatarMatt Redfearn <matt.redfearn@imgtec.com>
    Cc: linux-mips@linux-mips.org
    Cc: Jason Cooper <jason@lakedaemon.net>
    Cc: Marc Zyngier <marc.zyngier@arm.com>
    Cc: Ralf Baechle <ralf@linux-mips.org>
    Link: http://lkml.kernel.org/r/1492679256-14513-2-git-send-email-matt.redfearn@imgtec.comSigned-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
    f8dcd9e8
irq-mips-gic.c 28.7 KB