In Kbuild, Makefiles can add the same object to obj-y multiple
times.  So,

   obj-y += foo.o
   obj-y += foo.o

is fine.

However, this is not true when the same object is added multiple
times via composite objects.  For example,

   obj-y    += foo.o bar.o
   foo-objs := foo-bar-common.o foo-only.o
   bar-objs := foo-bar-common.o bar-only.o

causes build error because two instances of foo-bar-common.o are
linked into the vmlinux.

Makefiles tend to invent ugly work-around, for example
  - lib/zstd/Makefile
  - drivers/net/ethernet/cavium/liquidio/Makefile

The technique used in Kbuild to avoid the multiple definition error
is to use $(filter $(obj-y), $^).  Here, $^ lists the names of all
the prerequisites with duplicated names removed.

By replacing it with $(filter $(real-obj-y), $^) we can do likewise
for composite objects.  For built-in objects, we do not need to keep
the composite object structure.  We can simply expand them, and link
$(real-obj-y) to built-in.a.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>