Commit 002b27a5 authored by Michael Ellerman's avatar Michael Ellerman

powerpc/4xx: Remove CONFIG_BOOKE_OR_40x

Now that 40x is gone, replace CONFIG_BOOKE_OR_40x by CONFIG_BOOKE.
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/20240628121201.130802-5-mpe@ellerman.id.au
parent 732b32da
......@@ -63,7 +63,7 @@
static inline void __hard_irq_enable(void)
{
if (IS_ENABLED(CONFIG_BOOKE_OR_40x))
if (IS_ENABLED(CONFIG_BOOKE))
wrtee(MSR_EE);
else if (IS_ENABLED(CONFIG_PPC_8xx))
wrtspr(SPRN_EIE);
......@@ -75,7 +75,7 @@ static inline void __hard_irq_enable(void)
static inline void __hard_irq_disable(void)
{
if (IS_ENABLED(CONFIG_BOOKE_OR_40x))
if (IS_ENABLED(CONFIG_BOOKE))
wrtee(0);
else if (IS_ENABLED(CONFIG_PPC_8xx))
wrtspr(SPRN_EID);
......@@ -87,7 +87,7 @@ static inline void __hard_irq_disable(void)
static inline void __hard_EE_RI_disable(void)
{
if (IS_ENABLED(CONFIG_BOOKE_OR_40x))
if (IS_ENABLED(CONFIG_BOOKE))
wrtee(0);
else if (IS_ENABLED(CONFIG_PPC_8xx))
wrtspr(SPRN_NRI);
......@@ -99,7 +99,7 @@ static inline void __hard_EE_RI_disable(void)
static inline void __hard_RI_enable(void)
{
if (IS_ENABLED(CONFIG_BOOKE_OR_40x))
if (IS_ENABLED(CONFIG_BOOKE))
return;
if (IS_ENABLED(CONFIG_PPC_8xx))
......
......@@ -33,7 +33,7 @@ extern int distribute_irqs;
struct pt_regs;
#ifdef CONFIG_BOOKE_OR_40x
#ifdef CONFIG_BOOKE
/*
* Per-cpu stacks for handling critical, debug and machine check
* level interrupts.
......
......@@ -20,7 +20,7 @@ static __always_inline bool kuap_is_disabled(void);
#include <asm/nohash/32/kup-8xx.h>
#endif
#ifdef CONFIG_BOOKE_OR_40x
#ifdef CONFIG_BOOKE
#include <asm/nohash/kup-booke.h>
#endif
......
......@@ -159,7 +159,7 @@ struct thread_struct {
unsigned long sr0;
#endif
#endif /* CONFIG_PPC32 */
#if defined(CONFIG_BOOKE_OR_40x) && defined(CONFIG_PPC_KUAP)
#if defined(CONFIG_BOOKE) && defined(CONFIG_PPC_KUAP)
unsigned long pid; /* value written in PID reg. at interrupt exit */
#endif
/* Debug Registers */
......
......@@ -310,7 +310,7 @@ static inline void regs_set_return_value(struct pt_regs *regs, unsigned long rc)
static inline bool cpu_has_msr_ri(void)
{
return !IS_ENABLED(CONFIG_BOOKE_OR_40x);
return !IS_ENABLED(CONFIG_BOOKE);
}
static inline bool regs_is_unrecoverable(struct pt_regs *regs)
......
......@@ -18,7 +18,7 @@
#include <asm/feature-fixups.h>
/* Pickup Book E specific registers. */
#ifdef CONFIG_BOOKE_OR_40x
#ifdef CONFIG_BOOKE
#include <asm/reg_booke.h>
#endif
......
......@@ -54,7 +54,7 @@
#endif
#ifdef CONFIG_PPC32
#ifdef CONFIG_BOOKE_OR_40x
#ifdef CONFIG_BOOKE
#include "head_booke.h"
#endif
#endif
......
......@@ -108,7 +108,7 @@ transfer_to_syscall:
stw r11, 0(r1)
mflr r12
stw r12, _LINK(r1)
#ifdef CONFIG_BOOKE_OR_40x
#ifdef CONFIG_BOOKE
rlwinm r9,r9,0,14,12 /* clear MSR_WE (necessary?) */
#endif
lis r12,STACK_FRAME_REGS_MARKER@ha /* exception frame marker */
......
......@@ -21,7 +21,7 @@ _GLOBAL(epapr_ev_idle)
ori r4, r4,_TLF_NAPPING /* so when we take an exception */
PPC_STL r4, TI_LOCAL_FLAGS(r2) /* it will return to our caller */
#ifdef CONFIG_BOOKE_OR_40x
#ifdef CONFIG_BOOKE
wrteei 1
#else
mfmsr r4
......
......@@ -333,7 +333,7 @@ void __init init_IRQ(void)
static_call_update(ppc_get_irq, ppc_md.get_irq);
}
#ifdef CONFIG_BOOKE_OR_40x
#ifdef CONFIG_BOOKE
void *critirq_ctx[NR_CPUS] __read_mostly;
void *dbgirq_ctx[NR_CPUS] __read_mostly;
void *mcheckirq_ctx[NR_CPUS] __read_mostly;
......
......@@ -45,7 +45,7 @@ static struct hard_trap_info
{ 0x0800, 0x08 /* SIGFPE */ }, /* fp unavailable */
{ 0x0900, 0x0e /* SIGALRM */ }, /* decrementer */
{ 0x0c00, 0x14 /* SIGCHLD */ }, /* system call */
#ifdef CONFIG_BOOKE_OR_40x
#ifdef CONFIG_BOOKE
{ 0x2002, 0x05 /* SIGTRAP */ }, /* debug */
#if defined(CONFIG_PPC_85xx)
{ 0x2010, 0x08 /* SIGFPE */ }, /* spe unavailable */
......@@ -64,7 +64,7 @@ static struct hard_trap_info
{ 0x2010, 0x08 /* SIGFPE */ }, /* fp unavailable */
{ 0x2020, 0x08 /* SIGFPE */ }, /* ap unavailable */
#endif
#else /* !CONFIG_BOOKE_OR_40x */
#else /* !CONFIG_BOOKE */
{ 0x0d00, 0x05 /* SIGTRAP */ }, /* single-step */
#if defined(CONFIG_PPC_8xx)
{ 0x1000, 0x04 /* SIGILL */ }, /* software emulation */
......
......@@ -1875,7 +1875,7 @@ int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)
#if defined(CONFIG_PPC_BOOK3S_32) && defined(CONFIG_PPC_KUAP)
p->thread.kuap = KUAP_NONE;
#endif
#if defined(CONFIG_BOOKE_OR_40x) && defined(CONFIG_PPC_KUAP)
#if defined(CONFIG_BOOKE) && defined(CONFIG_PPC_KUAP)
p->thread.pid = MMU_NO_CONTEXT;
#endif
......
......@@ -29,7 +29,7 @@ void setup_tlb_core_data(void);
static inline void setup_tlb_core_data(void) { }
#endif
#ifdef CONFIG_BOOKE_OR_40x
#ifdef CONFIG_BOOKE
void exc_lvl_early_init(void);
#else
static inline void exc_lvl_early_init(void) { }
......
......@@ -176,7 +176,7 @@ void __init emergency_stack_init(void)
}
#endif
#ifdef CONFIG_BOOKE_OR_40x
#ifdef CONFIG_BOOKE
void __init exc_lvl_early_init(void)
{
unsigned int i, hw_cpu;
......
......@@ -695,7 +695,7 @@ static int __init get_freq(char *name, int cells, unsigned long *val)
static void start_cpu_decrementer(void)
{
#ifdef CONFIG_BOOKE_OR_40x
#ifdef CONFIG_BOOKE
unsigned int tcr;
/* Clear any pending timer interrupts */
......
......@@ -21,7 +21,7 @@ static inline void switch_mm_pgdir(struct task_struct *tsk,
#ifdef CONFIG_PPC_BOOK3S_32
tsk->thread.sr0 = mm->context.sr0;
#endif
#if defined(CONFIG_BOOKE_OR_40x) && defined(CONFIG_PPC_KUAP)
#if defined(CONFIG_BOOKE) && defined(CONFIG_PPC_KUAP)
tsk->thread.pid = mm->context.id;
#endif
}
......
......@@ -303,7 +303,7 @@ void switch_mmu_context(struct mm_struct *prev, struct mm_struct *next,
if (IS_ENABLED(CONFIG_BDI_SWITCH))
abatron_pteptrs[1] = next->pgd;
set_context(id, next->pgd);
#if defined(CONFIG_BOOKE_OR_40x) && defined(CONFIG_PPC_KUAP)
#if defined(CONFIG_BOOKE) && defined(CONFIG_PPC_KUAP)
tsk->thread.pid = id;
#endif
raw_spin_unlock(&context_lock);
......
......@@ -335,11 +335,6 @@ config BOOKE
depends on PPC_E500 || 44x
default y
config BOOKE_OR_40x
bool
depends on BOOKE
default y
config PTE_64BIT
bool
depends on 44x || PPC_E500 || PPC_86xx
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment