drm/amdgpu: Modify .ras_fini function pointer parameter

Modify .ras_fini function pointer parameter so that
we can remove redundant intermediate calls in some
ras blocks.
Signed-off-by: yipechai <YiPeng.Chai@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

@@ -644,7 +644,7 @@ int amdgpu_gfx_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *r
 	return r;
 }
 
-void amdgpu_gfx_ras_fini(struct amdgpu_device *adev)
+void amdgpu_gfx_ras_fini(struct amdgpu_device *adev, struct ras_common_if *ras_block)
 {
 	if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__GFX) &&
 			adev->gfx.ras_if)

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h

@@ -387,7 +387,7 @@ bool amdgpu_gfx_is_me_queue_enabled(struct amdgpu_device *adev, int me,
 void amdgpu_gfx_off_ctrl(struct amdgpu_device *adev, bool enable);
 int amdgpu_get_gfx_off_status(struct amdgpu_device *adev, uint32_t *value);
 int amdgpu_gfx_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block);
-void amdgpu_gfx_ras_fini(struct amdgpu_device *adev);
+void amdgpu_gfx_ras_fini(struct amdgpu_device *adev, struct ras_common_if *ras_block);
 int amdgpu_gfx_process_ras_data_cb(struct amdgpu_device *adev,
 		void *err_data,
 		struct amdgpu_iv_entry *entry);

drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c

@@ -455,16 +455,16 @@ int amdgpu_gmc_ras_late_init(struct amdgpu_device *adev)
 void amdgpu_gmc_ras_fini(struct amdgpu_device *adev)
 {
 	if (adev->umc.ras && adev->umc.ras->ras_block.ras_fini)
-		adev->umc.ras->ras_block.ras_fini(adev);
+		adev->umc.ras->ras_block.ras_fini(adev, NULL);
 
 	if (adev->mmhub.ras && adev->mmhub.ras->ras_block.ras_fini)
-		adev->mmhub.ras->ras_block.ras_fini(adev);
+		adev->mmhub.ras->ras_block.ras_fini(adev, NULL);
 
 	if (adev->gmc.xgmi.ras && adev->gmc.xgmi.ras->ras_block.ras_fini)
-		adev->gmc.xgmi.ras->ras_block.ras_fini(adev);
+		adev->gmc.xgmi.ras->ras_block.ras_fini(adev, NULL);
 
 	if (adev->hdp.ras && adev->hdp.ras->ras_block.ras_fini)
-		adev->hdp.ras->ras_block.ras_fini(adev);
+		adev->hdp.ras->ras_block.ras_fini(adev, NULL);
 }
 
 	/*

drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.c

@@ -24,7 +24,7 @@
 #include "amdgpu.h"
 #include "amdgpu_ras.h"
 
-void amdgpu_hdp_ras_fini(struct amdgpu_device *adev)
+void amdgpu_hdp_ras_fini(struct amdgpu_device *adev, struct ras_common_if *ras_block)
 {
 	if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__HDP) &&
 	    adev->hdp.ras_if)

drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h

@@ -44,5 +44,5 @@ struct amdgpu_hdp {
 };
 
 int amdgpu_hdp_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block);
-void amdgpu_hdp_ras_fini(struct amdgpu_device *adev);
+void amdgpu_hdp_ras_fini(struct amdgpu_device *adev, struct ras_common_if *ras_block);
 #endif /* __AMDGPU_HDP_H__ */

drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.c

@@ -24,7 +24,7 @@
 #include "amdgpu.h"
 #include "amdgpu_ras.h"
 
-void amdgpu_mmhub_ras_fini(struct amdgpu_device *adev)
+void amdgpu_mmhub_ras_fini(struct amdgpu_device *adev, struct ras_common_if *ras_block)
 {
 	if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__MMHUB) &&
 			adev->mmhub.ras_if)

drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.h

@@ -47,6 +47,6 @@ struct amdgpu_mmhub {
 	struct amdgpu_mmhub_ras  *ras;
 };
 
-void amdgpu_mmhub_ras_fini(struct amdgpu_device *adev);
+void amdgpu_mmhub_ras_fini(struct amdgpu_device *adev, struct ras_common_if *ras_block);
 #endif
 

drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.c

@@ -44,7 +44,7 @@ int amdgpu_nbio_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *
 	return r;
 }
 
-void amdgpu_nbio_ras_fini(struct amdgpu_device *adev)
+void amdgpu_nbio_ras_fini(struct amdgpu_device *adev, struct ras_common_if *ras_block)
 {
 	if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__PCIE_BIF) &&
 			adev->nbio.ras_if)

drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.h

@@ -105,5 +105,5 @@ struct amdgpu_nbio {
 };
 
 int amdgpu_nbio_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block);
-void amdgpu_nbio_ras_fini(struct amdgpu_device *adev);
+void amdgpu_nbio_ras_fini(struct amdgpu_device *adev, struct ras_common_if *ras_block);
 #endif

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h

@@ -491,7 +491,7 @@ struct amdgpu_ras_block_object {
 	int (*ras_block_match)(struct amdgpu_ras_block_object *block_obj,
 				enum amdgpu_ras_block block, uint32_t sub_block_index);
 	int (*ras_late_init)(struct amdgpu_device *adev, struct ras_common_if *ras_block);
-	void (*ras_fini)(struct amdgpu_device *adev);
+	void (*ras_fini)(struct amdgpu_device *adev, struct ras_common_if *ras_block);
 	ras_ih_cb ras_cb;
 	const struct amdgpu_ras_block_hw_ops *hw_ops;
 };

drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c

@@ -111,7 +111,7 @@ int amdgpu_sdma_ras_late_init(struct amdgpu_device *adev,
 	return r;
 }
 
-void amdgpu_sdma_ras_fini(struct amdgpu_device *adev)
+void amdgpu_sdma_ras_fini(struct amdgpu_device *adev, struct ras_common_if *ras_block)
 {
 	if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__SDMA) &&
 			adev->sdma.ras_if)

drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h

@@ -118,7 +118,7 @@ int amdgpu_sdma_get_index_from_ring(struct amdgpu_ring *ring, uint32_t *index);
 uint64_t amdgpu_sdma_get_csa_mc_addr(struct amdgpu_ring *ring, unsigned vmid);
 int amdgpu_sdma_ras_late_init(struct amdgpu_device *adev,
 			      struct ras_common_if *ras_block);
-void amdgpu_sdma_ras_fini(struct amdgpu_device *adev);
+void amdgpu_sdma_ras_fini(struct amdgpu_device *adev, struct ras_common_if *ras_block);
 int amdgpu_sdma_process_ras_data_cb(struct amdgpu_device *adev,
 		void *err_data,
 		struct amdgpu_iv_entry *entry);

drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c

@@ -162,7 +162,7 @@ int amdgpu_umc_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *r
 	return r;
 }
 
-void amdgpu_umc_ras_fini(struct amdgpu_device *adev)
+void amdgpu_umc_ras_fini(struct amdgpu_device *adev, struct ras_common_if *ras_block)
 {
 	if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__UMC) &&
 			adev->umc.ras_if)

drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h

@@ -73,7 +73,7 @@ struct amdgpu_umc {
 };
 
 int amdgpu_umc_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block);
-void amdgpu_umc_ras_fini(struct amdgpu_device *adev);
+void amdgpu_umc_ras_fini(struct amdgpu_device *adev, struct ras_common_if *ras_block);
 int amdgpu_umc_poison_handler(struct amdgpu_device *adev,
 		void *ras_error_status,
 		bool reset);

drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c

@@ -768,7 +768,7 @@ static int amdgpu_xgmi_ras_late_init(struct amdgpu_device *adev, struct ras_comm
 	return amdgpu_ras_block_late_init(adev, ras_block);
 }
 
-static void amdgpu_xgmi_ras_fini(struct amdgpu_device *adev)
+static void amdgpu_xgmi_ras_fini(struct amdgpu_device *adev, struct ras_common_if *ras_block)
 {
 	if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__XGMI_WAFL) &&
 			adev->gmc.xgmi.ras_if)

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

@@ -2433,7 +2433,7 @@ static int gfx_v9_0_sw_fini(void *handle)
 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
 	if (adev->gfx.ras && adev->gfx.ras->ras_block.ras_fini)
-		adev->gfx.ras->ras_block.ras_fini(adev);
+		adev->gfx.ras->ras_block.ras_fini(adev, NULL);
 
 	for (i = 0; i < adev->gfx.num_gfx_rings; i++)
 		amdgpu_ring_fini(&adev->gfx.gfx_ring[i]);

drivers/gpu/drm/amd/amdgpu/mca_v3_0.c

@@ -37,7 +37,7 @@ static void mca_v3_0_mp0_query_ras_error_count(struct amdgpu_device *adev,
 				         ras_error_status);
 }
 
-static void mca_v3_0_mp0_ras_fini(struct amdgpu_device *adev)
+static void mca_v3_0_mp0_ras_fini(struct amdgpu_device *adev, struct ras_common_if *ras_block)
 {
 	amdgpu_mca_ras_fini(adev, &adev->mca.mp0);
 }
@@ -83,7 +83,7 @@ static void mca_v3_0_mp1_query_ras_error_count(struct amdgpu_device *adev,
 				         ras_error_status);
 }
 
-static void mca_v3_0_mp1_ras_fini(struct amdgpu_device *adev)
+static void mca_v3_0_mp1_ras_fini(struct amdgpu_device *adev, struct ras_common_if *ras_block)
 {
 	amdgpu_mca_ras_fini(adev, &adev->mca.mp1);
 }
@@ -115,7 +115,7 @@ static void mca_v3_0_mpio_query_ras_error_count(struct amdgpu_device *adev,
 				         ras_error_status);
 }
 
-static void mca_v3_0_mpio_ras_fini(struct amdgpu_device *adev)
+static void mca_v3_0_mpio_ras_fini(struct amdgpu_device *adev, struct ras_common_if *ras_block)
 {
 	amdgpu_mca_ras_fini(adev, &adev->mca.mpio);
 }

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

@@ -1997,7 +1997,7 @@ static int sdma_v4_0_sw_fini(void *handle)
 
 	if (adev->sdma.ras && adev->sdma.ras->ras_block.hw_ops &&
 		adev->sdma.ras->ras_block.ras_fini)
-		adev->sdma.ras->ras_block.ras_fini(adev);
+		adev->sdma.ras->ras_block.ras_fini(adev, NULL);
 
 	for (i = 0; i < adev->sdma.num_instances; i++) {
 		amdgpu_ring_fini(&adev->sdma.instance[i].ring);

drivers/gpu/drm/amd/amdgpu/soc15.c

@@ -1215,7 +1215,7 @@ static int soc15_common_sw_fini(void *handle)
 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
 	if (adev->nbio.ras && adev->nbio.ras->ras_block.ras_fini)
-		adev->nbio.ras->ras_block.ras_fini(adev);
+		adev->nbio.ras->ras_block.ras_fini(adev, NULL);
 
 	if (adev->df.funcs &&
 	    adev->df.funcs->sw_fini)