Commit 03336d0f authored by Suzuki K Poulose's avatar Suzuki K Poulose Committed by Greg Kroah-Hartman

coresight: etm4x: Add sysreg access helpers

ETM architecture defines the system instructions for accessing
via register accesses. Add basic support for accessing a given
register via system instructions.

We split the list of registers as :
 1) Accessible only from memory mapped interface
 2) Accessible from system register instructions.

All registers are accessible via the memory-mapped interface.
However, some registers are not accessible via the system
instructions. This list is then used to further filter out
the files we expose via sysfs.

Link: https://lore.kernel.org/r/20210110224850.1880240-12-suzuki.poulose@arm.com
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: default avatarSuzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: default avatarMathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20210201181351.1475223-14-mathieu.poirier@linaro.orgSigned-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 4f2a6726
...@@ -75,6 +75,38 @@ static inline bool etm4x_sspcicrn_present(struct etmv4_drvdata *drvdata, int n) ...@@ -75,6 +75,38 @@ static inline bool etm4x_sspcicrn_present(struct etmv4_drvdata *drvdata, int n)
(drvdata->config.ss_status[n] & TRCSSCSRn_PC); (drvdata->config.ss_status[n] & TRCSSCSRn_PC);
} }
u64 etm4x_sysreg_read(u32 offset, bool _relaxed, bool _64bit)
{
u64 res = 0;
switch (offset) {
ETM4x_READ_SYSREG_CASES(res)
default :
pr_warn_ratelimited("etm4x: trying to read unsupported register @%x\n",
offset);
}
if (!_relaxed)
__iormb(res); /* Imitate the !relaxed I/O helpers */
return res;
}
void etm4x_sysreg_write(u64 val, u32 offset, bool _relaxed, bool _64bit)
{
if (!_relaxed)
__iowmb(); /* Imitate the !relaxed I/O helpers */
if (!_64bit)
val &= GENMASK(31, 0);
switch (offset) {
ETM4x_WRITE_SYSREG_CASES(val)
default :
pr_warn_ratelimited("etm4x: trying to write to unsupported register @%x\n",
offset);
}
}
static void etm4_os_unlock_csa(struct etmv4_drvdata *drvdata, struct csdev_access *csa) static void etm4_os_unlock_csa(struct etmv4_drvdata *drvdata, struct csdev_access *csa)
{ {
/* Writing 0 to TRCOSLAR unlocks the trace registers */ /* Writing 0 to TRCOSLAR unlocks the trace registers */
......
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