Commit 036db8bd authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'for-4.17-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata

Pull libata fixes from Tejun Heo:
 "An earlier commit to add reset control for embedded ahci controllers
  affected some of the hardware specific drivers and got reverted for
  now.

  Other than that, just per-device workarounds and trivial changes"

* 'for-4.17-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata:
  driver core: add __printf verification to __ata_ehi_pushv_desc
  ata: fix spelling mistake: "directon" -> "direction"
  libata: Apply NOLPM quirk for SanDisk SD7UB3Q*G1001 SSDs
  libata: Apply NOLPM quirk for SAMSUNG MZMPC128HBFU-000MV SSD
  ata: ahci: mvebu: override ahci_stop_engine for mvebu AHCI
  libahci: Allow drivers to override stop_engine
  Revert "ata: ahci-platform: add reset control support"
parents 93a0d340 0d74d872
...@@ -30,7 +30,6 @@ compatible: ...@@ -30,7 +30,6 @@ compatible:
Optional properties: Optional properties:
- dma-coherent : Present if dma operations are coherent - dma-coherent : Present if dma operations are coherent
- clocks : a list of phandle + clock specifier pairs - clocks : a list of phandle + clock specifier pairs
- resets : a list of phandle + reset specifier pairs
- target-supply : regulator for SATA target power - target-supply : regulator for SATA target power
- phys : reference to the SATA PHY node - phys : reference to the SATA PHY node
- phy-names : must be "sata-phy" - phy-names : must be "sata-phy"
......
...@@ -698,7 +698,7 @@ static int ahci_vt8251_hardreset(struct ata_link *link, unsigned int *class, ...@@ -698,7 +698,7 @@ static int ahci_vt8251_hardreset(struct ata_link *link, unsigned int *class,
DPRINTK("ENTER\n"); DPRINTK("ENTER\n");
ahci_stop_engine(ap); hpriv->stop_engine(ap);
rc = sata_link_hardreset(link, sata_ehc_deb_timing(&link->eh_context), rc = sata_link_hardreset(link, sata_ehc_deb_timing(&link->eh_context),
deadline, &online, NULL); deadline, &online, NULL);
...@@ -724,7 +724,7 @@ static int ahci_p5wdh_hardreset(struct ata_link *link, unsigned int *class, ...@@ -724,7 +724,7 @@ static int ahci_p5wdh_hardreset(struct ata_link *link, unsigned int *class,
bool online; bool online;
int rc; int rc;
ahci_stop_engine(ap); hpriv->stop_engine(ap);
/* clear D2H reception area to properly wait for D2H FIS */ /* clear D2H reception area to properly wait for D2H FIS */
ata_tf_init(link->device, &tf); ata_tf_init(link->device, &tf);
...@@ -788,7 +788,7 @@ static int ahci_avn_hardreset(struct ata_link *link, unsigned int *class, ...@@ -788,7 +788,7 @@ static int ahci_avn_hardreset(struct ata_link *link, unsigned int *class,
DPRINTK("ENTER\n"); DPRINTK("ENTER\n");
ahci_stop_engine(ap); hpriv->stop_engine(ap);
for (i = 0; i < 2; i++) { for (i = 0; i < 2; i++) {
u16 val; u16 val;
......
...@@ -350,7 +350,6 @@ struct ahci_host_priv { ...@@ -350,7 +350,6 @@ struct ahci_host_priv {
u32 em_msg_type; /* EM message type */ u32 em_msg_type; /* EM message type */
bool got_runtime_pm; /* Did we do pm_runtime_get? */ bool got_runtime_pm; /* Did we do pm_runtime_get? */
struct clk *clks[AHCI_MAX_CLKS]; /* Optional */ struct clk *clks[AHCI_MAX_CLKS]; /* Optional */
struct reset_control *rsts; /* Optional */
struct regulator **target_pwrs; /* Optional */ struct regulator **target_pwrs; /* Optional */
/* /*
* If platform uses PHYs. There is a 1:1 relation between the port number and * If platform uses PHYs. There is a 1:1 relation between the port number and
...@@ -366,6 +365,13 @@ struct ahci_host_priv { ...@@ -366,6 +365,13 @@ struct ahci_host_priv {
* be overridden anytime before the host is activated. * be overridden anytime before the host is activated.
*/ */
void (*start_engine)(struct ata_port *ap); void (*start_engine)(struct ata_port *ap);
/*
* Optional ahci_stop_engine override, if not set this gets set to the
* default ahci_stop_engine during ahci_save_initial_config, this can
* be overridden anytime before the host is activated.
*/
int (*stop_engine)(struct ata_port *ap);
irqreturn_t (*irq_handler)(int irq, void *dev_instance); irqreturn_t (*irq_handler)(int irq, void *dev_instance);
/* only required for per-port MSI(-X) support */ /* only required for per-port MSI(-X) support */
......
...@@ -62,6 +62,60 @@ static void ahci_mvebu_regret_option(struct ahci_host_priv *hpriv) ...@@ -62,6 +62,60 @@ static void ahci_mvebu_regret_option(struct ahci_host_priv *hpriv)
writel(0x80, hpriv->mmio + AHCI_VENDOR_SPECIFIC_0_DATA); writel(0x80, hpriv->mmio + AHCI_VENDOR_SPECIFIC_0_DATA);
} }
/**
* ahci_mvebu_stop_engine
*
* @ap: Target ata port
*
* Errata Ref#226 - SATA Disk HOT swap issue when connected through
* Port Multiplier in FIS-based Switching mode.
*
* To avoid the issue, according to design, the bits[11:8, 0] of
* register PxFBS are cleared when Port Command and Status (0x18) bit[0]
* changes its value from 1 to 0, i.e. falling edge of Port
* Command and Status bit[0] sends PULSE that resets PxFBS
* bits[11:8; 0].
*
* This function is used to override function of "ahci_stop_engine"
* from libahci.c by adding the mvebu work around(WA) to save PxFBS
* value before the PxCMD ST write of 0, then restore PxFBS value.
*
* Return: 0 on success; Error code otherwise.
*/
int ahci_mvebu_stop_engine(struct ata_port *ap)
{
void __iomem *port_mmio = ahci_port_base(ap);
u32 tmp, port_fbs;
tmp = readl(port_mmio + PORT_CMD);
/* check if the HBA is idle */
if ((tmp & (PORT_CMD_START | PORT_CMD_LIST_ON)) == 0)
return 0;
/* save the port PxFBS register for later restore */
port_fbs = readl(port_mmio + PORT_FBS);
/* setting HBA to idle */
tmp &= ~PORT_CMD_START;
writel(tmp, port_mmio + PORT_CMD);
/*
* bit #15 PxCMD signal doesn't clear PxFBS,
* restore the PxFBS register right after clearing the PxCMD ST,
* no need to wait for the PxCMD bit #15.
*/
writel(port_fbs, port_mmio + PORT_FBS);
/* wait for engine to stop. This could be as long as 500 msec */
tmp = ata_wait_register(ap, port_mmio + PORT_CMD,
PORT_CMD_LIST_ON, PORT_CMD_LIST_ON, 1, 500);
if (tmp & PORT_CMD_LIST_ON)
return -EIO;
return 0;
}
#ifdef CONFIG_PM_SLEEP #ifdef CONFIG_PM_SLEEP
static int ahci_mvebu_suspend(struct platform_device *pdev, pm_message_t state) static int ahci_mvebu_suspend(struct platform_device *pdev, pm_message_t state)
{ {
...@@ -112,6 +166,8 @@ static int ahci_mvebu_probe(struct platform_device *pdev) ...@@ -112,6 +166,8 @@ static int ahci_mvebu_probe(struct platform_device *pdev)
if (rc) if (rc)
return rc; return rc;
hpriv->stop_engine = ahci_mvebu_stop_engine;
if (of_device_is_compatible(pdev->dev.of_node, if (of_device_is_compatible(pdev->dev.of_node,
"marvell,armada-380-ahci")) { "marvell,armada-380-ahci")) {
dram = mv_mbus_dram_info(); dram = mv_mbus_dram_info();
......
...@@ -96,7 +96,7 @@ static int ahci_qoriq_hardreset(struct ata_link *link, unsigned int *class, ...@@ -96,7 +96,7 @@ static int ahci_qoriq_hardreset(struct ata_link *link, unsigned int *class,
DPRINTK("ENTER\n"); DPRINTK("ENTER\n");
ahci_stop_engine(ap); hpriv->stop_engine(ap);
/* /*
* There is a errata on ls1021a Rev1.0 and Rev2.0 which is: * There is a errata on ls1021a Rev1.0 and Rev2.0 which is:
......
...@@ -165,7 +165,7 @@ static int xgene_ahci_restart_engine(struct ata_port *ap) ...@@ -165,7 +165,7 @@ static int xgene_ahci_restart_engine(struct ata_port *ap)
PORT_CMD_ISSUE, 0x0, 1, 100)) PORT_CMD_ISSUE, 0x0, 1, 100))
return -EBUSY; return -EBUSY;
ahci_stop_engine(ap); hpriv->stop_engine(ap);
ahci_start_fis_rx(ap); ahci_start_fis_rx(ap);
/* /*
...@@ -421,7 +421,7 @@ static int xgene_ahci_hardreset(struct ata_link *link, unsigned int *class, ...@@ -421,7 +421,7 @@ static int xgene_ahci_hardreset(struct ata_link *link, unsigned int *class,
portrxfis_saved = readl(port_mmio + PORT_FIS_ADDR); portrxfis_saved = readl(port_mmio + PORT_FIS_ADDR);
portrxfishi_saved = readl(port_mmio + PORT_FIS_ADDR_HI); portrxfishi_saved = readl(port_mmio + PORT_FIS_ADDR_HI);
ahci_stop_engine(ap); hpriv->stop_engine(ap);
rc = xgene_ahci_do_hardreset(link, deadline, &online); rc = xgene_ahci_do_hardreset(link, deadline, &online);
......
...@@ -560,6 +560,9 @@ void ahci_save_initial_config(struct device *dev, struct ahci_host_priv *hpriv) ...@@ -560,6 +560,9 @@ void ahci_save_initial_config(struct device *dev, struct ahci_host_priv *hpriv)
if (!hpriv->start_engine) if (!hpriv->start_engine)
hpriv->start_engine = ahci_start_engine; hpriv->start_engine = ahci_start_engine;
if (!hpriv->stop_engine)
hpriv->stop_engine = ahci_stop_engine;
if (!hpriv->irq_handler) if (!hpriv->irq_handler)
hpriv->irq_handler = ahci_single_level_irq_intr; hpriv->irq_handler = ahci_single_level_irq_intr;
} }
...@@ -897,9 +900,10 @@ static void ahci_start_port(struct ata_port *ap) ...@@ -897,9 +900,10 @@ static void ahci_start_port(struct ata_port *ap)
static int ahci_deinit_port(struct ata_port *ap, const char **emsg) static int ahci_deinit_port(struct ata_port *ap, const char **emsg)
{ {
int rc; int rc;
struct ahci_host_priv *hpriv = ap->host->private_data;
/* disable DMA */ /* disable DMA */
rc = ahci_stop_engine(ap); rc = hpriv->stop_engine(ap);
if (rc) { if (rc) {
*emsg = "failed to stop engine"; *emsg = "failed to stop engine";
return rc; return rc;
...@@ -1310,7 +1314,7 @@ int ahci_kick_engine(struct ata_port *ap) ...@@ -1310,7 +1314,7 @@ int ahci_kick_engine(struct ata_port *ap)
int busy, rc; int busy, rc;
/* stop engine */ /* stop engine */
rc = ahci_stop_engine(ap); rc = hpriv->stop_engine(ap);
if (rc) if (rc)
goto out_restart; goto out_restart;
...@@ -1549,7 +1553,7 @@ int ahci_do_hardreset(struct ata_link *link, unsigned int *class, ...@@ -1549,7 +1553,7 @@ int ahci_do_hardreset(struct ata_link *link, unsigned int *class,
DPRINTK("ENTER\n"); DPRINTK("ENTER\n");
ahci_stop_engine(ap); hpriv->stop_engine(ap);
/* clear D2H reception area to properly wait for D2H FIS */ /* clear D2H reception area to properly wait for D2H FIS */
ata_tf_init(link->device, &tf); ata_tf_init(link->device, &tf);
...@@ -2075,14 +2079,14 @@ void ahci_error_handler(struct ata_port *ap) ...@@ -2075,14 +2079,14 @@ void ahci_error_handler(struct ata_port *ap)
if (!(ap->pflags & ATA_PFLAG_FROZEN)) { if (!(ap->pflags & ATA_PFLAG_FROZEN)) {
/* restart engine */ /* restart engine */
ahci_stop_engine(ap); hpriv->stop_engine(ap);
hpriv->start_engine(ap); hpriv->start_engine(ap);
} }
sata_pmp_error_handler(ap); sata_pmp_error_handler(ap);
if (!ata_dev_enabled(ap->link.device)) if (!ata_dev_enabled(ap->link.device))
ahci_stop_engine(ap); hpriv->stop_engine(ap);
} }
EXPORT_SYMBOL_GPL(ahci_error_handler); EXPORT_SYMBOL_GPL(ahci_error_handler);
...@@ -2129,7 +2133,7 @@ static void ahci_set_aggressive_devslp(struct ata_port *ap, bool sleep) ...@@ -2129,7 +2133,7 @@ static void ahci_set_aggressive_devslp(struct ata_port *ap, bool sleep)
return; return;
/* set DITO, MDAT, DETO and enable DevSlp, need to stop engine first */ /* set DITO, MDAT, DETO and enable DevSlp, need to stop engine first */
rc = ahci_stop_engine(ap); rc = hpriv->stop_engine(ap);
if (rc) if (rc)
return; return;
...@@ -2189,7 +2193,7 @@ static void ahci_enable_fbs(struct ata_port *ap) ...@@ -2189,7 +2193,7 @@ static void ahci_enable_fbs(struct ata_port *ap)
return; return;
} }
rc = ahci_stop_engine(ap); rc = hpriv->stop_engine(ap);
if (rc) if (rc)
return; return;
...@@ -2222,7 +2226,7 @@ static void ahci_disable_fbs(struct ata_port *ap) ...@@ -2222,7 +2226,7 @@ static void ahci_disable_fbs(struct ata_port *ap)
return; return;
} }
rc = ahci_stop_engine(ap); rc = hpriv->stop_engine(ap);
if (rc) if (rc)
return; return;
......
...@@ -25,7 +25,6 @@ ...@@ -25,7 +25,6 @@
#include <linux/phy/phy.h> #include <linux/phy/phy.h>
#include <linux/pm_runtime.h> #include <linux/pm_runtime.h>
#include <linux/of_platform.h> #include <linux/of_platform.h>
#include <linux/reset.h>
#include "ahci.h" #include "ahci.h"
static void ahci_host_stop(struct ata_host *host); static void ahci_host_stop(struct ata_host *host);
...@@ -196,8 +195,7 @@ EXPORT_SYMBOL_GPL(ahci_platform_disable_regulators); ...@@ -196,8 +195,7 @@ EXPORT_SYMBOL_GPL(ahci_platform_disable_regulators);
* following order: * following order:
* 1) Regulator * 1) Regulator
* 2) Clocks (through ahci_platform_enable_clks) * 2) Clocks (through ahci_platform_enable_clks)
* 3) Resets * 3) Phys
* 4) Phys
* *
* If resource enabling fails at any point the previous enabled resources * If resource enabling fails at any point the previous enabled resources
* are disabled in reverse order. * are disabled in reverse order.
...@@ -217,19 +215,12 @@ int ahci_platform_enable_resources(struct ahci_host_priv *hpriv) ...@@ -217,19 +215,12 @@ int ahci_platform_enable_resources(struct ahci_host_priv *hpriv)
if (rc) if (rc)
goto disable_regulator; goto disable_regulator;
rc = reset_control_deassert(hpriv->rsts);
if (rc)
goto disable_clks;
rc = ahci_platform_enable_phys(hpriv); rc = ahci_platform_enable_phys(hpriv);
if (rc) if (rc)
goto disable_resets; goto disable_clks;
return 0; return 0;
disable_resets:
reset_control_assert(hpriv->rsts);
disable_clks: disable_clks:
ahci_platform_disable_clks(hpriv); ahci_platform_disable_clks(hpriv);
...@@ -248,15 +239,12 @@ EXPORT_SYMBOL_GPL(ahci_platform_enable_resources); ...@@ -248,15 +239,12 @@ EXPORT_SYMBOL_GPL(ahci_platform_enable_resources);
* following order: * following order:
* 1) Phys * 1) Phys
* 2) Clocks (through ahci_platform_disable_clks) * 2) Clocks (through ahci_platform_disable_clks)
* 3) Resets * 3) Regulator
* 4) Regulator
*/ */
void ahci_platform_disable_resources(struct ahci_host_priv *hpriv) void ahci_platform_disable_resources(struct ahci_host_priv *hpriv)
{ {
ahci_platform_disable_phys(hpriv); ahci_platform_disable_phys(hpriv);
reset_control_assert(hpriv->rsts);
ahci_platform_disable_clks(hpriv); ahci_platform_disable_clks(hpriv);
ahci_platform_disable_regulators(hpriv); ahci_platform_disable_regulators(hpriv);
...@@ -405,12 +393,6 @@ struct ahci_host_priv *ahci_platform_get_resources(struct platform_device *pdev) ...@@ -405,12 +393,6 @@ struct ahci_host_priv *ahci_platform_get_resources(struct platform_device *pdev)
hpriv->clks[i] = clk; hpriv->clks[i] = clk;
} }
hpriv->rsts = devm_reset_control_array_get_optional_shared(dev);
if (IS_ERR(hpriv->rsts)) {
rc = PTR_ERR(hpriv->rsts);
goto err_out;
}
hpriv->nports = child_nodes = of_get_child_count(dev->of_node); hpriv->nports = child_nodes = of_get_child_count(dev->of_node);
/* /*
......
...@@ -4549,6 +4549,12 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = { ...@@ -4549,6 +4549,12 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = {
ATA_HORKAGE_ZERO_AFTER_TRIM | ATA_HORKAGE_ZERO_AFTER_TRIM |
ATA_HORKAGE_NOLPM, }, ATA_HORKAGE_NOLPM, },
/* This specific Samsung model/firmware-rev does not handle LPM well */
{ "SAMSUNG MZMPC128HBFU-000MV", "CXM14M1Q", ATA_HORKAGE_NOLPM, },
/* Sandisk devices which are known to not handle LPM well */
{ "SanDisk SD7UB3Q*G1001", NULL, ATA_HORKAGE_NOLPM, },
/* devices that don't properly handle queued TRIM commands */ /* devices that don't properly handle queued TRIM commands */
{ "Micron_M500_*", NULL, ATA_HORKAGE_NO_NCQ_TRIM | { "Micron_M500_*", NULL, ATA_HORKAGE_NO_NCQ_TRIM |
ATA_HORKAGE_ZERO_AFTER_TRIM, }, ATA_HORKAGE_ZERO_AFTER_TRIM, },
......
...@@ -175,8 +175,8 @@ static void ata_eh_handle_port_resume(struct ata_port *ap) ...@@ -175,8 +175,8 @@ static void ata_eh_handle_port_resume(struct ata_port *ap)
{ } { }
#endif /* CONFIG_PM */ #endif /* CONFIG_PM */
static void __ata_ehi_pushv_desc(struct ata_eh_info *ehi, const char *fmt, static __printf(2, 0) void __ata_ehi_pushv_desc(struct ata_eh_info *ehi,
va_list args) const char *fmt, va_list args)
{ {
ehi->desc_len += vscnprintf(ehi->desc + ehi->desc_len, ehi->desc_len += vscnprintf(ehi->desc + ehi->desc_len,
ATA_EH_DESC_LEN - ehi->desc_len, ATA_EH_DESC_LEN - ehi->desc_len,
......
...@@ -410,7 +410,7 @@ static int ahci_highbank_hardreset(struct ata_link *link, unsigned int *class, ...@@ -410,7 +410,7 @@ static int ahci_highbank_hardreset(struct ata_link *link, unsigned int *class,
int rc; int rc;
int retry = 100; int retry = 100;
ahci_stop_engine(ap); hpriv->stop_engine(ap);
/* clear D2H reception area to properly wait for D2H FIS */ /* clear D2H reception area to properly wait for D2H FIS */
ata_tf_init(link->device, &tf); ata_tf_init(link->device, &tf);
......
...@@ -285,13 +285,13 @@ static const struct sil24_cerr_info { ...@@ -285,13 +285,13 @@ static const struct sil24_cerr_info {
[PORT_CERR_INCONSISTENT] = { AC_ERR_HSM, ATA_EH_RESET, [PORT_CERR_INCONSISTENT] = { AC_ERR_HSM, ATA_EH_RESET,
"protocol mismatch" }, "protocol mismatch" },
[PORT_CERR_DIRECTION] = { AC_ERR_HSM, ATA_EH_RESET, [PORT_CERR_DIRECTION] = { AC_ERR_HSM, ATA_EH_RESET,
"data directon mismatch" }, "data direction mismatch" },
[PORT_CERR_UNDERRUN] = { AC_ERR_HSM, ATA_EH_RESET, [PORT_CERR_UNDERRUN] = { AC_ERR_HSM, ATA_EH_RESET,
"ran out of SGEs while writing" }, "ran out of SGEs while writing" },
[PORT_CERR_OVERRUN] = { AC_ERR_HSM, ATA_EH_RESET, [PORT_CERR_OVERRUN] = { AC_ERR_HSM, ATA_EH_RESET,
"ran out of SGEs while reading" }, "ran out of SGEs while reading" },
[PORT_CERR_PKT_PROT] = { AC_ERR_HSM, ATA_EH_RESET, [PORT_CERR_PKT_PROT] = { AC_ERR_HSM, ATA_EH_RESET,
"invalid data directon for ATAPI CDB" }, "invalid data direction for ATAPI CDB" },
[PORT_CERR_SGT_BOUNDARY] = { AC_ERR_SYSTEM, ATA_EH_RESET, [PORT_CERR_SGT_BOUNDARY] = { AC_ERR_SYSTEM, ATA_EH_RESET,
"SGT not on qword boundary" }, "SGT not on qword boundary" },
[PORT_CERR_SGT_TGTABRT] = { AC_ERR_HOST_BUS, ATA_EH_RESET, [PORT_CERR_SGT_TGTABRT] = { AC_ERR_HOST_BUS, ATA_EH_RESET,
......
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